1. Field of Invention
The present invention relates to a manufacturing method for a semiconductor device. More particularly, the present invention relates to the manufacturing of spacers whose thickness can be controlled and having a better reliability for hot carriers.
2. Description of Related Art
As the level of integration for integrated circuits is increased, device dimensions must be reduced, and channel length must also be reduced correspondingly. However, when the channel length is reduced to a certain extent, various kinds of problems will start to appear. One such problem is the so-called short channel effect, and a lightly doped drain (LDD) design is extensively used to deal with this problem. In the LDD design, lightly doped regions are formed in the source/drain region next to the channel region of a metal oxide semiconductor (MOS).
The LDD design requires the formation of spacers surrounding the gate electrode. Usually, silicon dioxide is the material for forming the spacers in a conventional method. However, due to the moisture absorption property and ability to trap hot carriers in trap centers for conventional silicon dioxide spacers, reliability of hot carriers is lowered. Despite the emergence of silicon nitride (SiN) spacers, which have better properties than the silicon dioxide spacers, there are other problems associated with silicon nitride spacers too. For a start, the amount of silicon nitride that needs to be etched is difficult to control with the conventional method. Therefore, thickness of the silicon nitride spacer can vary by quite an amount leading to thinner spacer and non-uniformity problems.
FIGS. 1A through 1C are cross-sectional views showing the progression of manufacturing steps in the fabrication of conventional spacers. First, as shown in FIG. 1A, a semiconductor substrate 10 is provided. Then, a field oxide layer 11 for defining the active device area 12 is formed over the substrate 10. Thereafter, an oxide layer and a polysilicon layer are sequentially formed over the active device region 12 of the substrate 10. The oxide layer can be, for example, a silicon dioxide layer. In a subsequent step, the oxide layer and the polysilicon layer are patterned to form a gate oxide layer 13 and a gate electrode 14. Then, a photoresist layer (not shown in the FIG.) is formed over the gate electrode 14. Next, ions having a low concentration level is implanted into the active device regions 12 forming lightly doped source/drain regions 15. Then, the photoresist layer is removed.
Next, in FIG. 1B, a layer of spacer material 16a is deposited over the active device regions 12 of the substrate 10 and the gate electrode 14 using a chemical vapor deposition method. The spacer can be, for example, silicon dioxide or silicon nitride having a thickness of about 100 .ANG. to 400 .ANG..
Finally, in FIG. 1C, a photoresist layer (not shown in the FIG.) is coated over the gate electrode 14, and then an ion implantation operation is performed using the spacers 16b as masks. Through the implantation, ions having a high concentration level are implanted into the active device regions 12 forming heavily doped source/drain regions 17.
However, if the spacer material is silicon dioxide, due to the moisture absorbing and hot carriers trapping properties of silicon dioxide, reliability of hot carriers will be somewhat lower. On the other hand, if the spacer is silicon nitride, the defects arising from the use of a silicon dioxide layer can be improved leading to a better reliability for the hot carriers. Yet, using a conventional method to manufacture a silicon nitride spacer, the amount of silicon nitride to be etched is still very difficult to control. Therefore, the correct thickness for a silicon nitride spacer is difficult to obtain and thereby leading to problems such as spacers that are too thin and have thickness that are not uniform.
In light of the foregoing, there is a need in the art for improving the method of forming spacers.